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Silicon Labs /BGM220PC22WGA /AGC_S /CTRL0

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Interpret as CTRL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PWRTARGET0 (CONT)MODE0RSSISHIFT0 (DISCFLOOPADJ)DISCFLOOPADJ 0 (DISRESETCHPWR)DISRESETCHPWR 0 (DISABLE)ADCATTENMODE 0ADCATTENCODE 0 (ENRSSIRESET)ENRSSIRESET 0 (DSADISCFLOOP)DSADISCFLOOP 0 (DISPNGAINUP)DISPNGAINUP 0 (DISPNDWNCOMP)DISPNDWNCOMP 0 (AGCRST)AGCRST

ADCATTENMODE=DISABLE, MODE=CONT

Description

No Description

Fields

PWRTARGET

Power Target
MODE

Mode

0 (CONT): AGC loop is adjusting gain continuously.

1 (LOCKPREDET): Gain is locked once a preamble is detected.

2 (LOCKFRAMEDET): Gain is locked once a sync word is detected.

3 (LOCKDSA): Gain is locked once DSA is detected.
RSSISHIFT

RSSI Shift
DISCFLOOPADJ

Disable gain adjustment by CFLOOP
DISRESETCHPWR

Disable Reset of CHPWR
ADCATTENMODE

ADC Attenuator mode

0 (DISABLE): ADC attenuator back-off will not be done by AGC

1 (NOTMAXGAIN): ADC attenuator is backed-off if rxgain is NOT MAXGAIN
ADCATTENCODE

ADC Attenuator code
ENRSSIRESET

Enables reset of RSSI and CCA
DSADISCFLOOP

Disable channel filter loop
DISPNGAINUP

Disable PN gain increase
DISPNDWNCOMP

Disable PN gain decrease compensation
AGCRST

AGC reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data